Showing posts with label Cpld. Show all posts
Showing posts with label Cpld. Show all posts

Wednesday, 31 July 2013

Complex Programmable Logical Devices

I already gave an small introduction about CPLDs in part III of the 3 Ghz counter build.
Cplds and Fpgas are very interesting devices for those who ever wanted to design their own integrated circuit but could not afford a million $ to let your prototype actually build.

A Cpld consists of the following elements:
Programmable And/Or matrices the macro cells
Programmable feedback
Input blocks
Output blocks

They distinguish themselves primarily in speed and the amount of programmable cells and pin count .
Unfortunately if you need many programmable macro cells the designers assumed you probably need many in out pins too. But many in out pins mean very small footprint and very home brew unfriendly.

So the hobby engineer is restricted to low cell count packages and therefore only small designs.

What are the advantages of a Cpld over a micro controller.
A Cpld can work massively parallel a  lightning speed.
The I/Os don't need a higher level control structure they work just by the logic assigned between an input and an output. They are often used for data capturing and collecting then they transfer the data to a high speed ram and then a micro controller  analyzes the data. Fast oscilloscopes would be unthinkable without high speed logic, micro controllers are ridiculously slow compared to Fpgas.

How to get started ?
Unfortunately programming and designing code for Cplds is completely different to program a micro controller and full of pitfalls.So the best way is to start small and use a simple low cell count target chip.
This is where Dangerous prototypes comes in, they designed two breakout boards based on the Coolrunner II series.One has a macro cell count of 72 and the other of 64.So you wont be able to run an Arm chip design on them but you could use them as multiplexer, inverter, ... You could reproduce the basic logic design blocks with them and combinations of them. You also get used to Verilog the programming language.
Later one if you decided you like the environment you could easily transit to the bigger high cell count Cplds.

To get started I would suggest the CoolRunner II XC2C64A CPLD with 64 macro cells and an Altera Usb Blaster programmer clone from Ebay.

As a first step I would work trough the Dangerous Prototypes tutorial section.

Cpld devboard and programmer



Links:
Dangerous Prototypes Cpld Board
Cpld Forum
Tutorials

Monday, 29 July 2013

3 Ghz counter and power detector build Part IV Putting the counter into service

After I had soldered the remaining parts like missing passives the lcd display and user buttons the build process was finished.
Before applying power I measured the resistance of the power lines  and some other important points to ensure there are no nasty shorts hiding somewhere.

The big moment applying power.
Nothing except a short blink of the lcd back light happened .
Hmmm
Soon I figured out there is a very nice software power switch  implemented.
You need to press the ok button to switch the unit on.
Very nice, I will implement that logic in my own designs too.
Power switches are so outdated.

So the unit works. As a first test I measured the power and frequency of an fm test generator.
Without calibration the frequency part worked ok but the power measurement was of by 3 db.
To calibrate the unit I need access to the university test lab, which I don't have until September.

First impressions, pros and cons of the unit:

Pros:
Very nice power on design
Usage of qfn components I lover to solder fine pitched smd devices
Cpld design
Open source software for the microchip and the cpld

Cons:
A usb port to export data is missing
The displayed frequency is always drifting
No gate time setting
Silk screen of pcb is horrible , very fuzzy and partly unreadable (the manufacturer promised to take care of this problem though)

In the end I am unfortunately disappointed of the unit.
On the other hand it still will be a help in the spectrum analyzer build process.
I am also thinking about implementing an serial output.
To log the data in a computer could be a big help. You could for example plot the frequency versus power output of a device and visualize the stability of the power in a given range.

Finally the counter in action (Please excuse the flare on the lcd)


Links:
3 Ghz counter and power detector build Part I
3 Ghz counter and power detector build Part II
3 Ghz counter and power detector build Part III
Elektor project page


Sunday, 28 July 2013

3 Ghz counter and power detector build Part III Cpld

The counter not only has a Dsp that needs programming, there is also a Cpld.
Cplds (Complex Programmable Logical Devices ) are very interesting parts.
A Cpld gives you the possibility to create your own integrated circuit.
In a very simplified explanation I would say they are made of thousands of gate arrays and configurable wires which connect between the gates and the pins.
Programming a Cpld is more like routing a pcb than programming a microcontroller.
A common language to describe your circuit is VHDL (Verilog Hardware Definition Language).

Cplds and Fpga (Field Programmable Gate Array) are very powerfull devices.
They can process tasks massively parallel are very fast but also expensive and tricky to program.

Programming a Cpld is usually done via Jtag interface.
I downloaded the Altera programmer and used a 5$ Jtag programmer clone of the Altera Usb Blaster.

Everything worked immediately .
The last step of the counter build is to add the rest of the passive components.

Successful programming of the Cpld
Links:
3 Ghz counter and power detector build Part I
3 Ghz counter and power detector build Part II
Elektor project page
Altera Homepage