The DDS module is designed and configured with a filter and squaring circuit in the DDS A path. The filter shown is a 10.7 MHz crystal filter with a 15 KHz bandwidth.
The squaring circuit of U3 will output a CMOS level, capable of driving a 50 ohm line (J4).
J3 output is an unfiltered output of the DDS B and will contain all harmonics and aliases of a normal DDS output. Its output power level is approximately -8 dBm.
For best results, the Clock Input at J1 should be a 5 volt peak to peak square wave, but it will operate at a much lower input. R3 determines the input impedance of the module. The input clock frequency must be between 1 MHz and 125 MHz, although the AD9850 is somewhat underrated.
Build process
Soldering the dds chip is somewaht tricky, good magnifying glasses are a must.
Since the DDS chips are serially programmed, I use a different pcb (which I got in a group buy) with only 5 inputs.I think it was routed by Sam Wetterlin but I am not sure.
Studying the schema carefully is highly advisable since there is always a chance that components are placed in a different location.
Because I am building the complete" analyzer, I had to solder two of this modules, the second one is used in the tracking generator.
One of the coming blog posts will be about testing the DDS module and how to shield a Slim module properly.
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| DDS module rev D with serial input only |
Links:
Spectrum analyzer Part I Controller board
Spectrum analyzer Part II Phase Detector
Spectrum analyzer Part III ADC 16
Spectrum analyzer Part IV Logarithmic Detector
Spectrum analyzer Part V Master Oscillator
DDS Module
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